SUDHA RATHI - SAN JOSE CA,
PING XU - CUPERTINO CA,
CHRISTOPHER BENCHER - SUNNYVALE CA,
JUDY HUANG - LOS GATOS CA,
KEGANG HUANG - FREMONT CA,
CHRIS NGAI - BURLINGAME CA,
257/762000, 438/633000, 438/634000, 438/687000, 438/778000, 257/767000
The present invention generally provides an improved process for depositing silicon carbide, using a silane-based material with certain process parameters, onto an electronic device, such as a semiconductor, that is useful for forming a suitable barrier layer, an etch stop, and a passivation layer for IC applications. As a barrier layer, in the preferred embodiment, the particular silicon carbide material is used to reduce the diffusion of copper and may also used to minimize the contribution of the barrier layer to the capacitive coupling between interconnect lines. It may also be used as an etch stop, for instance, below an intermetal dielectric (IMD) and especially if the IMD is a low k, silane-based IMD. In another embodiment, it may be used to provide a passivation layer, resistant to moisture and other adverse ambient conditions. Each of these aspects may be used in a dual damascene structure.